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SX1230
Integrated Transmitter IC
ADVANCED COMMUNICATIONS & SENSING
DATASHEET
where T RC is the RC oscillator period, periodic_n is programmable between 0 and 15 and periodic_d may take values
between 0 and 10. The maximum period is hence approximately 125 s when the frequency of the RC oscillator is 67 kHz.
Push button mode is enabled when the value of D is non-zero and, when activated, all stand alone mode functionality is
available. It is important to note that if there is no push button pressed, then no message will be transmitted.
6.1.4. Low Battery Indicator: Stand Alone Mode
The low battery indicator may be used in stand alone mode to detect the battery voltage and send a low battery message
to the receiver. It is enabled by setting the eol_frame_mode bit ‘high’ (register 0x12). The low battery state is determined by
comparing the supply voltage with a 1.695 V to 2.185 V programmable threshold (threshold trim_eol(2:0), address 0x12).
Following detection, the following actions are performed depending upon the exact mode of operation:
Normal Operation (Non-Periodic): The battery end-of-life condition is checked during the normal frame. If it is true, then
a single extra frame #14 (see Table 9) is automatically sent after the normal frame.
Stand-Alone Periodic Mode Operation: The battery end-of-life condition is checked during the normal frame. If it is true,
then the next frame, sent at the next timer tick is frame #14 (see Table 9), the frame is sent only once.
6.1.5. Low Battery Indicator: MCU Mode
In MCU mode the low battery status indicator may be accessed and configured via the SPI register EolCtrl. Alternatively,
the active high low battery indication is mapped to the PB0 pin allowing the independent generation of hardware interrupts.
6.2. MCU Mode
6.2.1. SPI Operation
The first byte in any data transfer over the SPI is the address read/write byte. It comprises:
1. W/RB bit, which is 1 for write access and 0 for read access
2. 7 bits of address, MSB first.
A transfer always starts by the NSS (not slave select) signal going low whilst SCK is high. MOSI (master out - slave in) is
generated by the master on the next falling edge of SCK and is sampled by the slave on the next rising edge of SCK. MISO
is generated by the slave on the falling edge of SCK and is high impedance when NSS is high. By convention, all bytes are
sent MSB first.
MCU mode is activated when pad E2_Mode is tied to GND (ground). In this mode the SX1230 is configured as SPI slave
and its internal configuration registers can be written following the format shown in Figure 7.
An ‘address write-byte‘ followed by a data byte is sent for a write access. Where multiple sequential registers are to be
written, the NSS input may be kept low after this first address-byte plus data-byte have been sent. In this state sequential
data-bytes may be written, the address is automatically incremented after the reception of each additional data-byte. This
allows the sequential data-bytes to be written without the need for an address byte. NSS must then be set ‘high’ after the
last byte transfer.
SX1230, Revision 2 May 2009
?2008 Semtech Corp.
Page 18
www.semtech.com
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